The invention relates to bus arbitration.
Different arbitration schemes exist for granting sequential access in response to multiple requests for a common computer system resource, such as a bus. Common arbitration schemes include the round-robin scheme and the fixed priority scheme, with variations to fit the specific needs of a computer system and to maximize fairness to devices requesting the common resource.
For example, the Peripheral Component Interconnect (PCI) Specification, Revision 2.1 (June 1995), suggests a 2-level arbitration scheme to implement a "fairness" algorithm for access to a PCI bus. According to the PCI Specification, some bus agents are assigned to the first level and the remaining bus agents are assigned to the second level, with the first level bus agents having higher priority than the second level bus agents. The second level bus agents have equal access to the bus with respect to other second level agents. The PCI specification suggests devices such as a video controller or an FDDI fiber optics network controller would be assigned to level 1, while devices such as a SCSI controller, local area network (LAN) interface cards, or standard expansion bus masters would be assigned to the second level.
Referring to FIG. 56, an example of the fairness arbitration algorithm using two levels of arbitration is shown. The first level consists of agent A, agent B, and the agent selected by the level 2 arbitration scheme. The second level includes agent X, agent Y, and agent Z. If all agents in levels 1 and 2 have their request lines maintained asserted, and if agent A is the next to receive the bus for level 1 and agent X is the next for level 2, then the order of the agents accessing the bus would be A, B, X, A, B, Y, A, B, Z, and so forth. This 2-level scheme achieves a degree of fairness by balancing the needs of high performance agents such as the video controller or the FDDI controller with lower performance bus devices such as the LAN and SCSI controllers.